A B C D E F G H I J K L M N O P Q R S T U V W X Y Z All
Prabakaran, T.
- Low Power 8TSRAM Design
Authors
1 SNS College of Technology, Coimbatore, IN
2 Electronics and Communication Engineering Department, SNS College of Technology, Coimbatore, IN
Source
Software Engineering, Vol 4, No 4 (2012), Pagination: 123-127Abstract
SRAM cell stability will be a primary concern for future technologies due to variability and decreasing power supply voltages. The conventional SRAM utilize 6 transistors. This cell has high power consumption due to false read operation. In order to improve stability, a half-select disturb free transistor SRAM cell is proposed. The existing cell is 6T SRAM. The proposed system utilizes this 6Tcell along with a decoupling logic. It utilizes a gated inverter SRAM cells to decouple the column select read disturb condition in half selected columns. This is one of the limitation to lowering the cell voltage. A false read operation is common in conventional 6T design due to bit select and word line timing mismatch. This is eliminated using the proposed 8T design. The design style analyzed is sense amp read based design. With the elimination of half select disturb, it is possible to enhance the overall array low voltage operability. Hence power consumption can be reduced by around 20%-30%. The tool used for simulation is Microwind.
Keywords
Decoupled Cell, Low Power 8T, SRAM, False Read, Sense AMP.
- Gassed Up (High Speed) Carry Select Adder for ALU Blocks
Authors
1 SNS College of Technology, IN
Source
Programmable Device Circuits and Systems, Vol 7, No 4 (2015), Pagination: 131-136Abstract
The regular SQRT CSLA consists of two RCA blocks with carry input as 0 and 1.The Final sum will be selected from multiplexers (MUX) by the carry out generated by the pervious block. This paper, proposes an area and delay efficient carry select adder with logical reduction of excess redundant hardware. In the proposed architecture, we had implemented the RCA with carry input as 1, only with MUX, OR gate and AND gate. For 16-bit regular SQRT CSLA there is a reduction of basic logic gates from 434 to 323.The delay is reduced by replacing Full-adder with half-adder in first bit of every RCA in the proposed architecture. This will reduces the number of Iterations required to get the final sum. The proposed architecture shows that there is reduction of area and delay. Based on this architecture, we designed 4-bit,8-bit,16 -bit and 32-bit Square-ischolar_main CSLA (SQRT CSLA) and compared with the regular SQRT CSLA. In this work, we evaluated the performance of the proposed design in 90-ηm CMOS Technology in Xilinx Tools. The result analysis shows that, the proposed SQRT CSLA of 4-bit, 8-bit 16-bit and 32-bit has a reduction of 31.74%, 30.13%, 21.92% and 21.76 % respectively compared with regular SQRT CSLA in area. The delay of Proposed SQRT CSLA of 4-bit,8-bit 16-bit and 32-bit are reduce by 27.47%, 17.23%, 14.32% and 11.63% respectively.
Keywords
Application-Specific Integrated Circuit (ASIC), Carry Select Adder (CSLA), Logic Reduction, Redundant Hardware, Ripple Carry Adder(RCA), Arithmetic Logic Unit(ALU)[2].- A Study on Challenges and Opportunities in Teaching Programming Subject to first Year Computer Science and Engineering Students:In the Perspective of Faculty and Student
Authors
1 Department of CSE, Malla Reddy Engineering College (Autonomous), Secunderabad – 500100, IN
Source
Journal of Engineering Education Transformations, Vol 31, No 3 (2018), Pagination: 74-78Abstract
Faculty experienced in teaching first year undergraduates agree that the students' in first year face a number of challenges. First year students are not only developing academically and intellectually, they are also establishing and maintaining good relationship around them, developing an identity, deciding about career and life style and developing integrated philosophy of life.Due to the gap in their school and engineering curriculum, learning the programming subject in their first semester become more conspicuous. In this paper, an attempt has been made to study and investigate various available opportunities and challenges faced by both fresh and experienced faculty to teach the "Computer programming in c language". A study has been conducted which comprises of a set of questions for which a collective response from the end users have been obtained. The results of this study enlighten various key areas to face the challenges and best ways to work with opportunities.Keywords
Computer Programming, Engineering Teaching, Challenges, Opportunities.- Deep Reinforcement Learning-based Optimization and Enhancement of Multimedia Data : An Innovative Approach
Authors
1 Department of Mechanical Engineering, Indian Institute of Information Technology Kalyani, IN
2 Department of Computer Science and Engineering, Joginpally B. R. Engineering College, IN
3 Department of Electronics and Communication Engineering, CVR College of Engineering, IN
4 Business Analytics Department, University of Rochester - Simon Business School, US
Source
ICTACT Journal on Image and Video Processing, Vol 13, No 4 (2023), Pagination: 3013-3020Abstract
The rapid growth of multimedia data in various domains has necessitated the development of efficient techniques to enhance and optimize its quality. Traditional approaches often struggle to address the complexity and diversity of multimedia data, leading to suboptimal results. This paper presents a novel approach to tackle this challenge by leveraging the power of deep reinforcement learning (DRL). The proposed method utilizes DRL to learn and optimize multimedia data in an improvised manner. By employing a combination of convolutional neural networks and deep Q-networks, the model can effectively extract high-level features and make informed decisions to enhance the quality of multimedia data. The reinforcement learning framework enables the system to learn from its actions, continuously improving its performance through an iterative process. To evaluate the effectiveness of the proposed method, extensive experiments were conducted using a diverse set of multimedia datasets. The results demonstrate significant improvements in various quality metrics, including image resolution, video frame rate, and audio clarity. Additionally, the proposed approach exhibits robustness across different types of multimedia data, ensuring consistent enhancement performance across various domains. Furthermore, the computational efficiency of the proposed method is also highlighted, as it demonstrates faster convergence and lower computational overhead compared to traditional optimization methods. This makes the approach practical for real-time applications where multimedia data needs to be processed efficiently. Overall, this paper introduces an innovative framework that combines deep reinforcement learning with multimedia data optimization. The results indicate its potential for enhancing multimedia data quality, offering a promising solution to the challenges associated with traditional approaches. The proposed method not only improves the visual and auditory aspects of multimedia content but also provides a scalable and efficient solution for real-world applications in domains such as image processing, video streaming, and audio analysis.Keywords
Deep Reinforcement Learning, Multimedia Data, Optimization, Enhancement, Convolutional Neural Networks, Deep Q-Networks, Quality Metrics, Computational Efficiency.References
- V. Saravanan and C. Chandrasekar, “Qos-Continuous Live Media Streaming in Mobile Environment using VBR and Edge Network”, International Journal of Computer Applications, Vol. 53, No. 6, pp. 1-12, 2012.
- K. Srihari and M. Masud, “Nature-Inspired-based Approach for Automated Cyberbullying Classification on Multimedia Social Networking”, Mathematical Problems in Engineering, Vol. 2021, pp. 1-12, 2021.
- V. Saravanan and M. Rizvana, “Dual Mode Mpeg Steganography Scheme for Mobile and Fixed Devices”, International Journal of Engineering Research and Development, Vol. 6, pp. 23-27, 2013.
- M.K. Gupta and P. Chandra, “Effects of Similarity/Distance Metrics on K-Means Algorithm with Respect to its Applications in IoT and Multimedia: A Review”, Multimedia Tools and Applications, Vol. 81, No. 26, pp. 37007-37032, 2022
- S. Huang and M. Sun, “Deep Reinforcement Learning for Multimedia Analysis: A Survey”, ACM Transactions on Multimedia Computing, Communications, and Applications, Vol. 16, No. 3, pp. 1-29, 2020.
- K. Zhang, “Reinforcement Learning for Image Restoration: A Comprehensive Review”, IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 43, No. 6, pp. 1760-1778, 2020.
- J. Chen, “Deep Reinforcement Learning-Based Video Streaming: A Survey”, ACM Computing Surveys, Vol. 52, No. 6, pp. 1-35, 2019.
- D. Xu, “Reinforcement Learning for Visual Object Detection”, IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 40, No. 3, pp. 590-604, 2018.
- Z. Chen, “Reinforcement Learning for Audio-Based Applications: A Comprehensive Survey”, IEEE Transactions on Emerging Topics in Computational Intelligence, Vol. 5, No. 4, pp. 269-285, 2021.
- Y. Wang, “Reinforcement Learning for Quality-Aware Multimedia Systems: A Survey”, ACM Transactions on Multimedia Computing, Communications, and Applications, Vol. 15, No. 3, pp. 1-29, 2019.
- Y. Liu and Y. Zhang, “Deep Reinforcement Learning for Multimedia Quality Assessment: A Survey”, IEEE Transactions on Multimedia, Vol. 21, No. 12, pp. 3151-3165, 2019.
- M. Kim and K. Chang, “Reinforcement Learning Based Adaptive Streaming Scheme with Edge Computing Assistance”, Sensors, Vol. 22, pp. 2171-2187, 2022.
- Failure Analysis of OLTC during Transition Resistor Test
Authors
1 CPRI, Bhopal - 462023, Madhya Pradesh, IN
Source
Power Research, Vol 18, No 2 (2022), Pagination: 121-125Abstract
Emerging modern technologies and ever-changing demands compete with each other to bring new changes to the sociotechnical life of human beings. OLTC is one such equipment connected as an integral part of the transformer to change the turns ratio while the transformer is in energized condition, to adjust the output voltage. Changing times and technology brought many changes in the OLTC techniques, design and operation. Traditionally OLTC is a complex mechanical device, which has some deficiencies. OLTC design elements are checked during the transition resistor test. Thus, OLTC testing for transition resistors is a method to enhance the reliability of OLTC design. This paper discusses a typical failure case of OLTC during the transition resistor test conducted in CPRI.Keywords
On Load Tap Changer (OLTC), Transition Resistor and Mechanical Device.References
- IEC standard 60214- 1: Tap changers Part 1: Performance requirements and test methods; 2014.
- Redfern MA, Handley WRC. Duty based maintenance for on-load transformer tap changers. IEEE; 2001. p. 1824-29. https://doi.org/10.1109/PESS.2001.970355 DOI: https://doi.org/10.1109/PESS.2001.970355
- Gao D. A new scheme for on-load tap changer of transformer. IEEE; 2002. p. 1016-20.
- Martins HJA, et al. Failures/Solutions in on load tap changer, 145kV. IEEE. 1998. p. 43-48.
- Govindappa BV. Recent trends in on-load tap changer technology- A study. Tutorial on- On load tap changer as per IS & IEC standards; 2011. p. 97-118.
- Pathak S. Switching test On-Load Tap Changer (OLTC). Tutorial on- On load tap changer as per IS & IEC standards; 2011. p. 69-96.
- Rogers DJ, Green TC. A hybrid diverter design for distribution level on-load tap changers. IEEE; 2010. p. 1493-1500. https://doi.org/10.1109/ECCE.2010.5618245 DOI: https://doi.org/10.1109/ECCE.2010.5618245